Single Register Load/Store Addressing Mode Syntax, Table, and Index Mode

In ARM architecture, data is only transferred between memory and registers using load (LDR) and store (STR) instructions.

Unlike x86, ARM uses Register-Indirect Addressing, where memory addresses are computed using base registers + offsets.

There are three main types of addressing for single register load/store instructions:

The addressing modes available with a particular load or store instruction depend on the instruction class.


The following Table shows the addressing modes available for load and store of a 32-bit word or an unsigned byte.

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